文章基本信息

标题：High-Speed Hardware Architectures for ARIA with Composite Field Arithmetic and Area-Throughput Trade-Offs
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作者：Lee, Sang-Woo ; Moon, Sang-Jae ; Kim, Jeong-Nyeo 等
期刊名称：ETRI Journal
印刷版ISSN：1225-6463
电子版ISSN：2233-7326
出版年度：2008
卷号：30
期号：5
页码：707-717
语种：English
出版社：Electronics and Telecommunications Research Institute
摘要：This paper presents two types of high-speed hardware architectures for the block cipher ARIA. First, the loop architectures for feedback modes are presented. Area-throughput trade-offs are evaluated depending on the S-box implementation by using look-up tables or combinational logic which involves composite field arithmetic. The sub-pipelined architectures for non-feedback modes are also described. With loop unrolling, inner and outer round pipelining techniques, and S-box implementation using composite field arithmetic over , throughputs of 16 Gbps to 43 Gbps are achievable in a 0.25 CMOS technology. This is the first sub-pipelined architecture of ARIA for high throughput to date.
关键词：ARIA;block cipher;cryptography;hardware architecture