文章基本信息

标题：A Low-Spur CMOS PLL Using Differential Compensation Scheme
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作者：Yun, Seok-Ju ; Kim, Kwi-Dong ; Kwon, Jong-Kee 等
期刊名称：ETRI Journal
印刷版ISSN：1225-6463
电子版ISSN：2233-7326
出版年度：2012
卷号：34
期号：4
页码：518-526
DOI：10.4218/etrij.12.0111.0417
语种：English
出版社：Electronics and Telecommunications Research Institute
摘要：This paper proposes LC voltage-controlled oscillator (VCO) phase-locked loop (PLL) and ring-VCO PLL topologies with low-phase noise. Differential control loops are used for the PLL locking through a symmetrical transformer-resonator or bilaterally controlled varactor pair. A differential compensation mechanism suppresses out-band spurious tones. The prototypes of the proposed PLL are implemented in a CMOS 65-nm or 45-nm process. The measured results of the LC-VCO PLL show operation frequencies of 3.5 GHz to 5.6 GHz, a phase noise of -118 dBc/Hz at a 1 MHz offset, and a spur rejection of 66 dBc, while dissipating 3.2 mA at a 1 V supply. The ring-VCO PLL shows a phase noise of -95 dBc/Hz at a 1 MHz offset, operation frequencies of 1.2 GHz to 2.04 GHz, and a spur rejection of 59 dBc, while dissipating 5.4 mA at a 1.1 V supply.
关键词：Phase-locked loop (PLL);differentially-tuned;CMOS;voltage-controlled oscillator (VCO);spur rejection;transformer;integrated circuit design