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  • 标题:Bus Serialization for Reducing Power Consumption
  • 本地全文:下载
  • 作者:Naoya Hatta ; Niko Demus Barli ; Chitaka Iwama
  • 期刊名称:Information and Media Technologies
  • 电子版ISSN:1881-0896
  • 出版年度:2006
  • 卷号:1
  • 期号:2
  • 页码:686-694
  • DOI:10.11185/imt.1.686
  • 出版社:Information and Media Technologies Editorial Board
  • 摘要:On-chip interconnects are becoming a major power consumer in scaled VLSI design. Consequently, bus power reduction has become effective for total power reduction on chip multiprocessors and system-on-a-chip requiring long interconnects as buses. In this paper, we advocate the use of bus serialization to reduce bus power consumption. Bus serialization decreases the number of wires and increases the pitch between the wires. The wider pitch decreases the coupling capacitances of the wires, and consequently reduces bus power consumption. Evaluation results indicate that our technique can reduce bus power consumption by 30% in the 45nm technology process.
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