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  • 标题:Application of Harmonic Mitigation Technique to a VSI fed by 12 pulse fully controlled rectifier circuit using passive filtering
  • 本地全文:下载
  • 作者:Akash Deo ; Deepanshu Sharma ; Dipesh Kumar Meena
  • 期刊名称:International Journal of Advances in Engineering and Management
  • 电子版ISSN:2395-5252
  • 出版年度:2021
  • 卷号:3
  • 期号:8
  • 页码:455-461
  • DOI:10.35629/5252-0308261265
  • 语种:English
  • 出版社:IJAEM JOURNAL
  • 摘要:This paper demonstrates the result of simulation when we induct a passive single tuned filter with a 12 pulse converter circuit. Harmonic occurrence is one of the major concern’s in operation of these power electronic devices, research and studies have been made to bring down the harmonic distortion level. The upshot in the harmonic occurrence leads to overheating of devices, scaling down of efficiency of transformers and affecting efficacy of the power electronic devices thus leading to increased system cost and running cost. We depicted a model of rectifier circuit and a VSI model linked with passive tuned filter and in which a close to practical R L circuit has also been utilized. the output current increase due to harmonics have been tried to bring down to a satisfactory level and reducing the THD level we are targeting 5 th order harmonic as lower order ones are more dominant specifically 3rd order. The results have been found satisfactory and has been shown below for the same.
  • 关键词:Harmonic analysis;passive shunt filter
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