期刊名称:International Journal of Innovative Research in Computer and Communication Engineering
印刷版ISSN:2320-9798
电子版ISSN:2320-9801
出版年度:2021
卷号:9
期号:7
页码:8582-8589
DOI:10.15680/IJIRCCE.2021.0907127
语种:English
出版社:S&S Publications
摘要:The on-chip bus in system-on-chip implements architecture called Advanced Microcontroller Bus Architecture (AMBA). AMBA is extensively implemented in the Application Specific Integrated circuit (ASIC) and SOC components. Advanced Peripheral Bus (APB) is a low-bandwidth and low-performance bus connected to low bandwidth peripherals like Keypad, UART, timer, etc... For interfacing purposes, low execution transport and fewer data move capacity in APB are used. The paper proposes the design and verification of the APB Protocol. The design is implemented using Verilog HDL and test cases are generated. The verification is carried out using Universal Verification Methodology (UVM). The software used here is Synopsys with technology. A standard methodology for the verification of an Integrated Circuit (IC) design is UVM.UVM Consists of a set of base classes with methods defined in it.