文章基本信息

标题：SYNTHESIS OF COMPOSITE LOGIC GATE IN QCAEMBEDDING UNDERLYING REGULAR CLOCKING
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作者：Jayanta Pal ; Dhrubajyoti Bhowmik ; Ayush Ranjan Singh 等
期刊名称：Facta universitatis - series: Electronics and Energetics
印刷版ISSN：0353-3670
电子版ISSN：2217-5997
出版年度：2021
卷号：34
期号：1
页码：115-131
语种：English
出版社：University of Niš
摘要：Quantum-dot Cellular Automata (QCA) has emerged as one of the alternativetechnologies for current CMOS technology. It has the advantage of computing at a fasterspeed, consuming lower power, and work at Nano- Scale. Besides these advantages, QCAlogic is limited to its primitive gates, majority voter and inverter only, results in limitation ofcost-efficient logic circuit realization. Numerous designs have been proposed to realizevarious intricate logic gates in QCA at the penalty of non-uniform clocking and improperlayout. This paper proposes a Composite Gate (CG) in QCA, which realizes all the essentialdigital logic gates such as AND, NAND, Inverter, OR, NOR, and exclusive gates like XORand XNOR. Reportedly, the proposed design is the first of its kind to generate all basic logicin a single unit. The most striking feature of this work is the augmentation of the underlyingclocking circuit with the logic block, making it a more realistic circuit. The Reliable,Efficient, and Scalable (RES) underlying regular clocking scheme is utilized to enhance theproposed design’s scalability and efficiency. The relevance of the proposed design is bestcited with coplanar implementation of 2-input symmetric functions, achieving 33% gain ingate count and without any garbage output. The evaluation and analysis of dissipatedenergy for both the design have been carried out. The end product is verified using theQCADesigner2.0.3 simulator, and QCAPro is employed for the study of power dissipation.
关键词：Composite Gate; Regular Clocking; 2-input Symmetric Function; QCA; RES Clocking; Basic Gates; Energy Dissipation