摘要:AbstractLarge interconnected modules result in complex system of higher order and often of interval structure, making the overall study and analysis, time consuming and complicated. Accepting the challenge to state an approximate model of such system, both system analysts and control engineers, headed towards the model order reduction. Continuing the same, this paper revisits few noteworthy estimation techniques for simplification of discrete-time interval system. In particular, denominator is derived through reciprocal algorithm and numerator by two varied algorithms. The proposed algorithms are validated with examples from literatures and real-time test systems via assessment of error computation. Limitation encountered during the course is also taken into count.